Signed Arithmetic
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Signed binary arithmetic is one of the most interesting topics in the overall binary arithmetics section. It lays foundation to binary subtraction as we will learn in the coming sections. For now let's begin by trying to represent negative numbers using binary. Mind you, there are no symbols like +/- in computers. With the available number of bits, our task is to represent signed numbers and also do arithmetics with them.
1) Signed numbers representation in binary
So far, every of our dealing in binary arithmetics is unsigned. We never considered adding a positive and a negative number (or subtracting a number from the other). But if we want our calculator to operate on negative numbers as well, we need to figure out their representation and arithmetics. Let's start with representing negative numbers first. Primarily, negative numbers are represented in two ways - Sign-Magnitude and 2's complement.
Sign-Magnitude Representation
This way of representation is relatively simple. Here, we assign the Most Significant Bit (MSB/First bit from left) as the 'Sign Bit'.
For example, in 4-bit calculations, -5 will be 1101 where the left most bit is 1 to represent a minus sign and the rest (101) represents the magnitude i.e. 5
Another example,
Note: From here onwards, we always talk about n-bit arithmetics where n is the fixed bit width of our circuits. Changing from a smaller bit width to a bigger one will require sign extension, about which we will discuss in the next section.
1's Complement
Before moving to 2's complement, let's start with 1's complement which is much simpler. 1's complement can also be used to represent negative numbers. 1's complement is obtained by simply inverting each bit of the number. For example, 17 in binary is 10001, and its 1's complement is 01110. Even here, the MSB represents the sign of the numbers.
There are some inherent issues with representing numbers using the above mentioned ways.
Firstly, in both the systems you have two ways of writing the number zero.
* In 4-bit signed magnitude form, both 1000 and 0000 are zero.
* In 4-bit 1's complement form, both 0000 and 1111 are zero.
Secondly, adding the negative of a number to itself
* does not produce a zero in sign magnitude form.
* produces all 1's in 1's complement form which complicates the arithmetics.
A more robust and computationally coherent way of representing signed numbers is 2's complement method.
2) Two's complement
When we studied overflow in the accumulator, we saw a curious behavior: once a 4-bit result went past 15, the stored value suddenly wrapped around. For example, adding two numbers sometimes produced a result that looked like a + b − 16 instead of the true mathematical sum. This means our hardware silently “dropped” the extra bit because it had nowhere to store it. Now imagine choosing a second number so that the true answer should be 16—such as adding 3 and 13. In real math the result is 16, but in a 4-bit system the stored value becomes 0000. From the circuit’s point of view, adding 13 behaves exactly like adding −3. This wrap-around behavior is not a flaw—it is the key idea behind 2’s complement. In fixed-width binary systems, certain bit patterns are deliberately interpreted as negative numbers so that simple addition hardware can perform both addition and subtraction automatically, as we will learn in the next section.
* Two’s complement has a single, unique representation for zero which is 0000 (in 4-bit).
* The MSB still acts as the sign bit: 0 = positive, 1 = negative.
* A 4 bit 2's complement signed representation has a range of -8 to 7; in 8-bit, the range is -128 to 127.
* To negate a number, invert all its bits(1's complement) and add 1.
Activity: Try out adding a few numbers with their 2's complement by manually entering a number to one of the inputs in the adder and its 2's complement on the other input.
3) Two's complement generator circuit
Both of the following circuits generate the two's complement of the input.
Components you may need:
- 1 × 74LS04 Hex Inverter IC
- 1 × 74LS32 Quad OR gate IC
- 1 × 74LS86 Quad XOR gate IC
- 1 × 74LS283 4-bit Adder IC
- 1 × DIP Switch (4-bit input)
- 8 × 220 Ω resistors
- 4 × LEDs
- Jumper wires
- Breadboard
- 5V power supply
Note: You can implement either of the two circuits above. Both generate the 2's complement, so pick whichever you find easier to wire up!
Sign Extension
2's complement based signed numbers have to be sign extended when shifting from a smaller number of bits to a higher number of bits to ensure that the arithmetics doesn't suffer in the process. In 2's complement representation, the sign of the number can be determined easily by examining the MSB of the number. If it's a 1, it's a negative number, and if it's a 0, it's a positive number. Let us take two numbers, say -4 and 6. The signed binary representations in 4-bit are 1100 and 0110 respectively. Now let's extend these to 8-bits. The number 6 can simply be extended with zeroes and the result would be 00000110, which is the same positive 6. But if we extend the -4 with just zeroes, the number becomes 00001100 which is 12. To fix this, we read the MSB of any number and fill the blank bits after extension with the MSB. i.e. -4 in 8-bit would become 11111100 which is indeed -4. This is really important because this could easily break arithmetics when moving from a small bit width to a bigger one.
Final Submission
In the next exercise, we will learn about more complicated arithmetic and logical operations in binary, and the circuitry for it.